RESEARCH ARTICLE


Characteristics of GaAs Power MESFETs with Double Silicon Ion Implantations for Wireless Communication Applications



Chun-Yi Zheng1, Wen-Jung Chiang1, Yeong-Lin Lai*, 2, Edward Y. Chang3, Shen-Li Chen4, K. B. Wang3
1 Department of Mechatronics Engineering, National Changhua University of Education, Changhua 50007, Taiwan
2 Mechatronic Integration and System Control Research Center, National Changhua University of Education, Changhua 50007, Taiwan
3 Department of Materials Science and Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan
4 Department of Electronic Engineering, National United University, Miaoli 36063, Taiwan


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© Lai et al; Licensee Bentham Open.

open-access license: This is an open access article licensed under the terms of the Creative Commons Attribution-Non-Commercial 4.0 International Public License (CC BY-NC 4.0) (https://creativecommons.org/licenses/by-nc/4.0/legalcode), which permits unrestricted, non-commercial use, distribution and reproduction in any medium, provided the work is properly cited.

* Address correspondence to this author at the Department of Mechatronics Engineering, National Changhua University of Education, Changhua 50007, Taiwan; Tel: +886-4-7232105; Fax: +886-4-7211149; E-mail: yllai@cc.ncue.edu.tw


Abstract

GaAs power metal-semiconductor field-effect transistors (MESFETs) were fabricated using direct double silicon (Si) ion implantation technology for wireless communication applications. A 150-µm MESFET had a saturation drain current of 238 mA/mm after Si3N4 passivation. A 15-mm MESFET, when measured under a class-AB condition with a biased drain voltage of 3.4 V and a quiescent drain current of 600 mA, delivered a maximum output power (Pout) of 31.1 dBm and a maximum power-added efficiency (PAE) of 58.0% at a frequency of 1.88 GHz. The MESFET exhibited a Pout of 29.2 dBm with a PAE of 45.0% at the 1-dB gain compression point. The MESFET, when measured under a deep class-B condition with a biased drain voltage of 4.7 V and a quiescent drain current of 50 mA, achieved a maximum Pout of 33.1 dBm and a maximum PAE of 55.9% at 1.88 GHz. The MESFET operating at 4.7 V and 1.88 GHz exhibited a P1dB of 31.8 dBm and an associated PAE of 47.1% at the 1-dB gain compression point. When tested by IS-95 code-division multiple access (CDMA) standard signals and biased at 4.7 V under the deep class-B condition, the MESFET with a Pout of 28 dBm demonstrated an adjacent channel power rejection (ACPR) of –31.2 dBc at +1.25 MHz apart from the 1.88 GHz center frequency and –45.7 dBc at +2.25 MHz.

Keywords: Code-division multiple access (CDMA), direct ion implantation, GaAs, power MESFET, wireless communication.



INTRODUCTION

Power transistors are key components of the power amplifiers in the transmitters of wireless communication systems [1-14]. There is a great demand for high-performance power transistors which meet the requirements of advanced wireless communication systems [15-23]. Ion-implanted GaAs power metal-semiconductor field-effect transistors (MESFETs) have been studied as to their wireless communication applications [24-29]. A GaAs power multi-chip integrated circuit using ion-implanted GaAs power MESFETs delivered an output power (Pout) of 1.3 W at 3.5 V for cellular phone communications from 890 to 950 MHz [24]. High-efficiency GaAs power MESFETs with an asymmetrical lightly-doped drain structure gave 32.5-dB output power at 4.7 V for 950-MHz communications [25]. Conventional ion-implanted GaAs power MESFETs were developed for analog communication applications. Instead of analog wireless communications, digital wireless communications have dominated the wireless trend because of their higher capacity. An analog/digital dual-mode power module with ion-implanted GaAs power MESFETs showed a power-added efficiency (PAE) of 56% at 3.7 V for the North American digital cellular (NADC) communications [26]. A 36-mm GaAs power MESFET using selective ion implantation and semi-insulating setback layer technologies delivered a Pout of 31.5 dBm at 5.8 V for digital communication applications [27]. Most ion-implanted GaAs power MESFETs have been implemented by means of selective ion implantation technology [24-27]. The alignment and process of the n+ source and drain selectively-implanted regions are critical for the characteristics of MESFETs. Lai and coworkers first reported on GaAs power MESFETs using direct ion implantation technology, with silicon (Si) and beryllium (Be) ion implantations, for low-voltage digital wireless communication applications [28]. A 2.2-V-operation GaAs power MESFET with a gate width of 2 mm demonstrated an adjacent channel power rejection (ACPR) of –58 dBc and a PAE of 57.2% at a Pout of 21.3 dBm. A planar-gate GaAs power MESFET with direct Si and Be ion implantations also showed good characteristics at 3.6 V [29]. GaAs power MESFETs with direct ion implantations provide a cost-effective solution for digital wireless communications [30].

In this study, GaAs power MESFETs were fabricated by means of direct double Si ion implantations for digital wireless communication applications. The power characteristics of the MESFETs including Pout, PAE, gain, and ACPR were demonstrated.

FABRICATION

The GaAs power MESFETs were fabricated with double 29Si+-ion implantations into a semi-insulating GaAs wafer. Channel implantation was conducted by 29Si+ ion implantation with an energy of 200 keV and a dosage of 3.0 × 1012 cm-2 to form a channel layer with high current capability. Surface implantation was implemented by 29Si+ ion implantation with an energy of 50 keV and a dosage of 1.0 × 1012 cm-2 to form a low-resistivity ohmic layer.

The GaAs wafer was sputtered with silicon nitride film for the passivation process after double 29Si+-ion implantations. The passivation process was used to prevent the decomposition of the GaAs material and the loss of arsenic atoms during the subsequent activation process with high-temperature annealing. The activation process was carried out by rapid thermal annealing (RTA) at 800°C. The sheet resistance of wafer after annealing was 512 Ω/□.

The Au/Ge/Ni/Au ohmic metal with a thickness of 0.4 μm was deposited by an electron gun system and alloyed by RTA at 330°C. The specific contact resistance of the ohmic contact was in the 10-7-Ω∙cm2 range. The Ti/Pt/Au gate metal with a gate length of 1 μm was formed after a gate recess process. The gate widths of the MESFETs included 150 μm and 15 mm. A silicon nitride passivation layer was deposited using a plasma-enhanced chemical vapor deposition (PECVD) system in order to protect the device from humidity and contamination. The fabricated power MESFET with a gate width of 15 mm is shown in Fig. (1). Once the front-side process was completed, the backside of the wafer was lapped to 4 mils and plated by gold metal in order to improve the thermal conductance.

Fig. (1).

Fabricated GaAs power MESFET with a gate width of 15 mm.


PERFORMANCE

The on-wafer measurements of the DC characteristics of the MESFETs, including the current-voltage and breakdown characteristics, were conducted in order to monitor and control the processes during the fabrication of the MESFETs. A MESFET with a gate width of 150 μm, rather than 15 mm, was used for the on-wafer DC measurement, because devices with a small gate width would not generate a current large enough to damage themselves. Fig. (2) shows the current-voltage characteristics of the MESFET with a gate width of 150 µm after the Si3N4 passivation. The saturation drain current of the device was 35.7 mA, corresponding to a current density of 238 mA/mm. Fig. (3) shows the gate-to-drain breakdown characteristics after the Si3N4 passivation. The gate-to-drain breakdown voltage was 17 V. The current-voltage characteristics of the 150-μm MESFET after the airbridge process are shown in Fig. (4). The saturation drain current of the MESFET was 35 mA, corresponding to a current density of 233 mA/mm. The saturation drain current characteristics after the Si3N4 passivation and airbridge processes were very close.

Fig. (2).

Current-voltage characteristics of 150-µm MESFET after Si3N4 passivation.


Fig. (3).

Gate-to-drain breakdown characteristics after Si3N4 passivation.


The gate-to-drain breakdown characteristics after the airbridge process are shown in Fig. (5). The gate-to-drain breakdown voltage was 17 V. The gate-to-drain breakdown characteristics after the Si3N4 passivation and airbridge processes were the same.

Fig. (4).

Current-voltage characteristics of 150-µm MESFET after airbridge process.


The power characteristics of the MESFET with a gate width of 15 mm were measured by means of a load-pull power tuning system. The impedances of the input and output tuners of the system were tuned to obtain the optimum source and load matching for maximum Pout and PAE. The measurement frequency was 1.88 GHz. The MESFET was biased at operation voltages of 3.4 V and 4.7 V. When the MESFET was biased at a drain voltage of 3.4 V, it was tested under a class-AB condition with a quiescent drain current of 600 mA.

When the MESFET was biased at a drain voltage of 4.7 V, it was expected that it would have better power performance than the one biased at 3.4 V because of the higher voltage supply. A more stringent condition, a deep class-B condition with a quiescent drain current of 50 mA, was adopted at 4.7 V in order to evaluate the extreme power capability of the MESFET as far as the linearity was concerned.

Fig. (5).

Gate-to-drain breakdown characteristics after airbridge process.


Fig. (6) depicts the Pout and PAE as functions of the input power for the MESFET biased at 3.4 V and 4.7 V. The device operating at 3.4 V demonstrated a maximum Pout of 31.1 dBm and a maximum PAE of 58.0%. The Pout at the 1-dB gain compression point (P1dB) and the associated PAE were 29.2 dBm and 45.0%, respectively. The MESFET operating at a drain voltage of 4.7 V achieved a maximum Pout of 33.1 dBm and a maximum PAE of 55.9%. At a P1dB of 31.8 dBm, the MESFET operating at 4.7 V exhibited a PAE of 47.1%. It was found that the MESFET operating at 4.7 V displayed better maximum Pout and P1dB, even under a deep class-B condition, than one operating at 3.4 V under a class-AB condition.

Fig. (6).

Pout and PAE as a function of input power for 15-mm MESFET biased at 3.4 V and 4.7 V.


Fig. (7) shows the power gain as a function of the input power for the MESFET biased at 3.4 V and 4.7 V. The linear gain characteristics of the MESFET operating at 3.4 V and 4.7 V were 11.3 dB and 11.4 dB, respectively. The linear gain characteristics of the MESFET at 3.4 V under the class-AB condition were comparable to those at 4.7 V under the deep class-B condition. The GaAs power MESFET using double ion implantation technology demonstrated high Pout and PAE. In addition, the high P1dB associated with high efficiency indicated high linearity and low distortion for digital wireless communication applications.

Fig. (7).

Power gain as a function of input power for 15-mm MESFET biased at 3.4 V and 4.7 V.


The 15-mm MESFET was tested for digital wireless applications. The device was measured using modulated IS-95 code-division multiple access (CDMA) standard signals. The signal source was the Anritsu-MG3670C digital modulation signal generator. The output power spectrum of the device was measured by the HP-8595E spectrum analyzer. The data were taken when the device was biased at a drain voltage of 4.7 V under a deep class-B condition. The quiescent drain current of the device was 50 mA. Fig. (8) shows the CDMA output power spectrum of the MESFET. At a Pout of 28 dBm, the device exhibited an ACPR of –31.2 dBc at +1.25 MHz apart from the 1.88-GHz center frequency, and an ACPR of –45.7 dBc at +2.25 MHz. The power MESFET achieved excellent ACPR characteristics at an extremely low bias current for CDMA wireless communication applications.

In this study, the GaAs power MESFETs were fabricated using double 29Si+-ion implantations, including channel implantation with an implantation energy of 200 keV and an implantation dosage of 3.0 × 1012 cm-2, and surface implantation with an implantation energy of 50 keV and an implantation dosage of 1.0 × 1012 cm-2. On the basis of the study results, more implantation energy and dosage conditions can be set as parameters for further study of the characteristics of GaAs power MESFETs with respect to various modern wireless communication applications.

Fig. (8).

CDMA output power spectrum of 15-mm MESFET.


CONCLUSION

The GaAs power MESFETs were fabricated by means of double Si ion implantation technology for wireless communications. The power performance of the MESFET for digital wireless communication applications was studied. The MESFET operating at 3.4 V and 1.88 GHz achieved a Pout of 31.1 dBm, a PAE of 58.0%, and a linear gain of 11.3 dB. At a deep class-B condition, the MESFET biased at 50 mA and 4.7 V exhibited an ACPR of –31.2 dBc at +1.25 MHz apart from the 1.88-GHz center frequency, while the Pout was 28 dBm. The power MESFET using direct double Si ion implantations, with the advantages of high yields and low costs, demonstrated excellent power characteristics for digital wireless communication applications.

CONFLICT OF INTEREST

The authors confirm that this article content has no conflict of interest.

ACKNOWLEDGEMENTS

This work was supported in part by the Ministry of Science and Technology of Taiwan, R.O.C. under Contracts MOST 103-2911-I-009-302, MOST 103-2221-E-018-021 and MOST 104-2221-E-018-016.

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